Wednesday, July 25, 2012

Expand Your Archive

Computer System Architecture - M M Mano
Mediafire link: http://www.mediafire.com/?8cq0fjo8co5s1sg

Circuit Design with VHDL - V A Pedroni
 Mediafire link: http://www.mediafire.com/?hwtfiyaqiwtzoe7

Computer Organization and Architecture - William Stallings
Mediafire link: http://www.mediafire.com/?3wogijszo2iv3x9

Computer Organization and Embedded Systems - Hamachar Vranesic and Zaky
Mediafire link: http://www.mediafire.com/?kmn34f2uqmd4kpz


Tuesday, April 24, 2012

A PRESENTATION ON HARDWARE SOFTWARE CO-DESIGN


HARDWARE SOFTWARE CO-DESIGN

SLIDE: General Note 
Software team designs with complete knowledge of hardware capabilities and features and hardware team designs with complete knowledge of software CDFGs (Control Data Flow Graph) and functions to be achieved. Certain software functions are implemented by hardware and certain hardware functions are implemented by software with the aim of achieving desired system performance at optimum cost. 

SLIDE: Key Concepts 
There are two approaches for embedded system design. 
[1] The software development life cycle ends and the life cycle for process of integrating the software into the hardware begin at the time when a system is designed. 
[2] Both cycles proceed concurrently when co-designing a time critical sophisticated system. 
The final design when implemented, gives the targeted embedded system and thus the final product. Therefore, an understanding of the (i) software and hardware designs and integrating both into a system and (ii) hardware-software co-designing are important aspects of designing embedded systems. 
There is a tradeoff between the hardware and software. Hardware implementations provide advantage of greater processing speed at the compromise of cost criterion, whereas software implementations provide portability and swift maneuvering at the worth of reduced precession. So a distinct tradeoff boundary has to be set prior to implementation depending on the expected constraints. 

SLIDE: Requirements for Efficient Co-design 
[1] Once the tradeoff boundary is set, a unified and unbiased hardware software representation has to be made to facilitate uniform design and analysis technique for both hardware and software as well as to permit system evaluation in an Integrated Development Environment (IDE) and intra-system task migration between HW and SW. 
[2] The iterative partitioning technique of HW/SW modules aids in determining the best implementation for a system in terms of functionality and performance goals. 
[3] Continuous or incremental evaluation at several stages of the design is achieved by means of Integrated Modeling Substrate. It takes necessary HW and/or SW changes into consideration in both design paths at every stage rather than waiting until final integration, which results in a smoother integration process. 
[4] The system must include a validation methodology to insure that the system meets its initial requirements after the final integration. The validation methodology may use ‘formal verification technique’ or ‘simulation based validation’. 

SLIDE: Scope of Co-design 
HW/SW codesign method is adopted by numerous domains, namely a few:
Embedded Systems:
        System On Chip (SOC)
        Manufacturing Control
        Control Electronics
        Automobiles
        Telecommunications
        Defense Systems
Instruction Set Architectures (ISAs), e.g.- Application Specific Instruction-set Processor (ASIP).
Reconfigurable Systems.
Fabrication Technology. 

SLIDE: Merits & Demerits 
The benefits of using co-design method: 
1] Due to the current advancement in key enabling technologies, easier exploration of design trade off is ensured. 
2] Mutual influence of HW/SW throughout the design process provides greater reliability. 
3] Tool inter-operability reduces design time even in case of larger design specifications. 
4] Strict system specification conformity. 
It also imposes some setbacks or limitations: 
1] Separate HW/SW development paths may lead to costly modifications and schedule slippages. 
2] Errors in HW/SW design become much more fatal as codesign method involves greater commitments. 
3] Scarcity of good validation and evaluation methods. 
4] Lack of standardized representation. 

SLIDE: Prologue 
Undoubtedly, HW/SW codesign is a pinnacle of the contemporary manufacturing technology and can be transformed into an even more lethal mean for further uplifting, provided the potentially challenging issues are curbed down in the forthcoming days. 

Take a quick look at the slides below:








The Power-Point Presentation is available for download in a compressed (.rar) format. 
Download Link: 
http://www.mediafire.com/?reqvfhv6b4v4sxb

Monday, April 23, 2012

8051 MICROCONTROLLER: HOBBY PROJECT

8051 Microcontroller & IR Sensor Based Object Detection and Collision Avoidance System 




CHAPTER I: PROLOGUE
The main objective of this design is to implement a collision avoidance system based on 89C51 microcontroller and infrared (IR) sensors, as a major building block for the sake of completion of the autobot project. Before going into the depths of its constructional characteristics and functional details, few basic perceptions associated to the microcontroller, IR transmitter, IR receiver, timer IC and the theory of operation has to be revived for the sake of its profound understanding. 

1.1 INFRARED BASICS 
As illustrated in Figure 1.1, Infrared is an energy radiation with a frequency below our eyes sensitivity level, thus can’t be seen with naked eyes. Infrared waves can be easily generated and does not undergo electromagnetic interference, so it can be used abundantly for communication and control oriented operations. There are some potentially constraining sources of infrared emission also, such as sunlight (a major source of infrared), or any other heat radiating body in the vicinity that can cause severe interference to infrared energy levels. Despite of the presence of these restraining aspects Infrared wave finds hand full of applications in the field of electronics and can easily be opted as a far better means to implement the line of sight collision detection scheme over the existing alternatives. 
 
Figure 1.1: Light Spectrum

1.2 OBJECT DETECTIONAND COLLISION AVOIDANCE 
The principle of object detection is carried out by infrared waves radiated from IR light emitting diodes (LEDs) and monitoring the reflected light by means of IR sensors to detect the presence of any obstacle on the line of sight path. Thereafter, depending upon it, the microcontroller makes a befitting decision to avoid the collision. The concept of obstacle detection and collision avoidance is depicted in Figure 1.2. 

Figure 1.2: Principle of Operation

Here the phrase ‘befitting decision’ means to make the robotic cart to take a turn towards the correct direction or to stall its motion and to take a ‘U-turn’ depending upon the obstacle’s dimensions and its location in the path. 


CHAPTER II: PRIME CONSTITUENTS
The major constituents devised in this project are: AT89C51 microcontroller IC to control the rest of the blocks and to perform collision detection and avoidance, 555 timer IC for the sake of triggering the IR LEDs. TSAL 6200 IR LEDs, used as infrared emitter and TSAL 1738 IR sensor, used to receive the reflected IR waves. 

2.1 IR LED 
TSAL6200 by VISHAY Semiconductors is a high efficiency infrared emitting diode in Gallium Aluminum Arsenide (GaAlAs) on Gallium Arsenide (GaAs) technology, molded in clear, blue-grey tinted plastic packages. These IR LEDs provide high radiant at a low forward voltage. They emit IR waves of 760 nm wavelength. 

Figure 2.1: TSAL6200 IR LED

2.2 IR SENSOR 
TSOP1738 by VISHAY Semiconductors is an ambient light immune low power consumptive photo detector and pre amplifier embedded in the single epoxy package for IR wave reception and demodulation. The pinnacle of this IR sensor is that the demodulated output signal can directly be fed to the controller unit as it supports both TTL and CMOS logics reducing the requirement of additional hardware for decoding. This sensor can demodulate IR wave of frequency 38 kHz accurately. Pin 1 is GND, Pin 2 is Vs and Pin 3 is OUT. 

Figure 2.2: TSOP1738 IR Sensor

2.3 TIMER IC 
The 555 timer IC has become a mainstay in electronics design. The timer produces a pulse when a trigger signal is applied to it. The pulse length is determined by charging and discharging a capacitor connected to the timer. The 555 timer can operate in a monostable (one-shot) or astable (oscillatory) or time-delay mode. Here the astable mode of operation is opted for the project. The IC looks as given in Figure 2.3. 

Figure 2.3: 555 Timer Pin Details

As output pin oscillates from high to low creating a series of output pulses, the duration for which output stays high is tHIGH=0.67.C.(R1+R2) and the duration for which it stays low is tLOW= 0.67.C.R2. Then the frequency for the series of pulses will be (Figure 2.4): 
The IR sensor can detect IR signal of 38 kHz so components has to be rigged in such a way so that the frequency of the output signal (in turn the IR wave) will be 38 kHz only for the train of IR pulses get detected accurately. 

Figure 2.4: Astable Mode Circuit

2.4 MICROCONTROLLER 
The Atmel 89C51 microcontroller is used for controlling the peripherals and the relevant program is written in assembly level language. Figure 2.5 shows the pin details of this dual inline package. 

Figure 2.5: AT89C51 Pin Details


CHAPTER III: HARDWARE & THEORY
The discussion of hardware and the underlying theory is broadly classified into two major parts: transmitter section (IR LED and related triggering issues) and receiver section (IR sensor and microcontroller functionality). The transmitter section is more or less independent, because it is triggered using 555 timer IC and only thing to do with this is to tune its frequency to 38 kHz to be exact. And there onwards its job is to emit IR waves of that frequency. 
Comparatively, the receiver section seems to be a little complicated because it has to do sack full of jobs and that too with sheer precision: like sensing the reflected IR wave and then forwarding it to the microcontroller. The microcontroller by means of duly coded program interprets the data and makes the decision on behalf of the robotic cart. 

3.1 TRANSMITTER SECTION 
The IR based emitter circuit is illustrated in Figure 3.1. Values of R1, R2 and C has to be such that frequency of the modulated infrared light wave equals 38 kHz (Formula mentioned in section 2.4 are used for the calculation). Despite of all the calculation, discrepancies may arise. To avoid that, the 10 KΩ POT has to be tuned to get the exact value on a CRO first then that resistance value can be used for the transmitter. 

Figure 3.1: Transmitter Section

As we can see in Figure 3.1, there are three IR LEDs used here one is for any obstacle coming on the right side another two are for left sided and central object detection. 

3.2 RECEIVER SECTION 
The receiver circuit is depicted in Figure 3.2. Two TSOP1738 IR demodulator is used to monitor the three IR LEDs distinctly. Accordingly the sensor outputs are fed to the Port pins 3.4 and 3.5 (T0 and T1 respectively) of the microcontroller which are then used for decision making purpose and to control the movement of the robot’s wheels connected via unipolar stepper motors. Depending upon the sensed data, the microcontroller notifies the motor’s wheel controller through Port pins 1.0 and 1.1 in the form of an interrupt whether a turn has to be taken or not. In case of a turn, it notifies the motor controller about the turn’s direction by raising the respective Port 1 pin high. Accordingly the motor’s controller will adjust the stepper motor’s rotation to perform a turn in the correct direction to avoid the probable collision. 
Figure 3.2: Receiver Section


CHAPTER IV: ALGORITHM & CODING
This chapter highlights the algorithm of sensing any obstacle coming on the way and making the cart’s wheel to take a turn for the sake of avoiding collision with that obstacle along with the assembly level code to implement the algorithm. 

4.1 FLOW DIAGRAM


4.2 CALCULATION AND PRESUMES 
We know that the operating frequency of TSOP1738 is 38 kHz. So, the time period for a single pulse will be its inverse: T=1/f =0.026315789 ms. Let there be 80 such pulses in a single burst, bringing the burst length to B =80 x T=2.105263158 ms. In the presence of an obstacle there will be pulses at the detector output, let the pulse detection threshold be 50 pulses per burst. So, 51 or more pulses in a single burst will invoke a turning action. Considering the fact that due to the presence of noise in the surroundings there will be around 30 pulses received by the detector for every burst. There will be an inter burst gap of 40 cycles. This concept holds good for a single IR sensor. To implement more than one sensors all we have to do is just to switch from one sensor to another after every burst (with an inter burst gap obviously) and this operation has to be performed continuously in a cyclic manner on every IR demodulator. 

4.3 CIRCUIT DIAGRAM 
The following circuit diagram comprises both the transmitter and receiver section along with the power supply module also. 


4.4 ASSEMBLY LANGUAGE PROGRAM 
      The following code is written for the prototype in the standard assembly programming language for 8051 series of microcontrollers. This assembly coding conforms to the design stated above but due to dependency on other module such as the motor controller, the delay value required for that module to perform turning operation has to be calculated separately and should be fed to the DELAY entitled portion for its proper functionality. 
                ORG 0000H
                MOV P1,#00H                       ; port 1 as output
//for left side obstacle checking//
      RPT: MOV TMOD,#15H                ; timer1= timer, timer0= counter
                SETB P3.4                              ; p3.4= input for counter 0
                MOV TL0,#00H                     ; initialize counter
                MOV TH0,#00H                    ;
                MOV TL1,#6BH                    ; time delay for one burst
                MOV TH1,#0F8H                  ;
                SETB TR1                              ; start timer 1
BACK1: JNB TF1,BACK1                   ; check for timer 1 overflow
                CLR TF1                    
                CLR TR1                                ; stop timer 1
                MOV A,TL0                           ; take count value and do collision
                CLR C                                     ; check for left side obstacle
                SUBB A,#1FH                        ;
                JNB PSW.2,ROTRYT            ;
                CLR PSW.2                            ;
                ACALL DELAY1                   ; inter burst delay
//for right side obstacle checking//
                MOV TMOD,#51H                ; timer0= timer, timer1= counter
                SETB P3.5                              ; p3.5= input for counter 1
                MOV TL1,#00H                     ; initialize counter
                MOV TH1,#00H                    ;
                MOV TL0,#6BH                    ; time delay for one burst
                MOV TH0,#0F8H                  ;
                SETB TR0                              ; start timer 0
BACK2: JNB TF0,BACK2                   ; check for timer 0 overflow
                CLR TF0                                ;
                CLR TR0                                ; stop timer 0
                MOV A,TL1                           ; take count value and do collision
                CLR C                                    ; check for right side obstacle
                SUBB A,#1FH                        ;
                JNB PSW.2,ROTLFT             ;
                CLR PSW.2                            ;
                ACALL DELAY2                   ; inter burst delay
                SJMP RPT                              ; repeat the same
                END
//delay for left side obstacle case//
DELAY1: MOV TMOD,#10H               ; inter burst delay for left check
                 MOV TL1,#35H                     ; it is half of the burst length
                 MOV TH1,#0FCH                 ;
                 SETB TR1                              ;
 BACK3: JNB TF1,BACK3                   ;
                 CLR TF1                                ;
                 CLR TR1                                ;
                 RET
//delay for right side obstacle case//
DELAY2: MOV TMOD,#01H               ; inter burst delay for right check
                 MOV TL0,#35H                     ; it is half of the burst length
                 MOV TH0,#0FCH                 ;
                 SETB TR0                              ;
 BACK4: JNB TF0,BACK4                   ;
                 CLR TF0                                ;
                 CLR TR0                                ;
                 RET
//right turn for left side obstacle//    
ROTRYT: SETB P1.0                            ; if obstacle on left
                   ACALL DELAY                   ; raise p1.0 high
                   CLR P1.0                              ; to perform
                   RET                                       ; right turn
//left turn for right side obstacle//
 ROTLFT: SETB P1.1                      ; if obstacle on left
                   ACALL DELAY             ; raise p1.1 high
                   CLR P1.1                        ; to perform
                   RET                                 ; left turn
//delay for motor controller to do its job//
  DELAY: MOV R1,#IMM_VAL1   ; let the motor controller
  HERE1: MOV R2,#IMM_VAL2   ; module do its job
  HERE2: DJNZ R2,HERE2             ; delay value is calculated
                 DJNZ R1,HERE1             ; on the basis of that code
                 RET 










PCB Schematic & Silk-Screen of 89C2051 Microcontroller Developement Board

      The developement board is dedicated for usages related to any 89C2051 (20 pin DIP) microcontroller, a very frequently used one in the academic arena. Generally, most of the evaluation boards available in the market are beyond the affordability range of an individual. Keeping this in mind the board is designed such that it will cope with various small-scale project related utilities and provide a deeper insight of microcontroller interfacing to the learners.

The Populated PCB alongwith Circuit Schematic are as follows:





Salient features of this developement board:
[1] It is a low-cost and simple design.
[2] Both of the two ports of the microcontroller are easily accessible for further measures.
[3] It has an on-board reset switch. 
[4] It is a Dual-Sided PCB Layout. 

[Note: The download link mentioned below contains the PCB silk-screen in a PDF file and the top-view of the Final PCB (with components populated on it) and Data-sheet of the foretold microcontroller and a list of components as well. Use the PDF file to develope the silk-screen for mass PCB fabrication.] 


Download Link: 
http://www.mediafire.com/?cft799im2ftbvx1





PRESENTATION ON: IP-CORE PROCESSORS

PREVIEW OF THE PRESENTATION: 
       Here comes a quick glimpse of the Power-Point presentation on "IP-CORE PROCESSORS". The whole presentation is available for download in a compressed format (.rar) from the mediafire link mentioned below. 








Download Link: 
http://www.mediafire.com/?8jti17ffsdmb2ig

A Interesting Book on Basic Electronics

Here is an interesting book on Basic Electronics named 'Hands-On Electronics' by Daniel M. Kaplan and Christopher G. White from Cambridge University Press. This title traverses on a vast range of topics with pellucid descriptions and some nice illustrations too.

Hope it would be useful for the "Electronics-Folks".....


Here comes the mediafire link for this book [in PDF format]:
http://www.mediafire.com/?yz3tqjs3y3fhn5s

PRESENTATION ON: CMOS LATCH UP


CMOS LATCH UP

SLIDE: LATCH UP

Latch Up in CMOS
            Latch Up maybe defined as the creation of a low impedance path between the power supply rails of a CMOS process caused due to the triggering of some innate parasitic device. Obviously, it is a failure mechanism for CMOS integrated circuits, ceasing  its normal functionality either temporarily or permanently.

Primitives of SCR
            Silicon Controlled Rectifier (SCR) is a three terminal power electronic device. It is normally OFF (infact, negligible current flows through it) when it is in FORWARD BLOCKING STATE (upto a turn-on voltage, VT). In the CONDUCTING STATE, when adequate triggering signal is applied to the GATE terminal its behavior resembles with a forward biased diode (conducts from ANODE to CATHODE) upto a specific voltage value VK (knee voltage).
            While operating in the conducting state, a considerable amount of current from G is injected into the base of npn transistor. It causes a current flow in the base-emitter junction of the pnp transistor. Consequently the pnp transistor turns on; causing further current to be injected into the base of the npn transistor. The whole setup acts like a positive feedback coupling; where current flowing through each transistor ensures that the other remains in saturation mode. This gives rise to a continual low impedance path between anode and cathode causing erratic current flow through the device beyond VK. The SCR is said to be in LATCHED STATE.
            Once latched, this arrangement becomes independent of the triggering source (gate terminal). So simply removing it will not turn-off the SCR.



SLIDE: PREVENTION

Parasitic Elements Illustration
            Since all MOS devices are closely located on the die there is the possibility of formation of parasitic SCR devices and with adequate excitation they might conduct as well. As in case of the CMOS inverter illustrated here, the parasitic structure gets triggered when supply voltage exceeds the absolute maximum ratings or improperly managed multiple power supplies are present or input/output pin voltage exceeds either power supply rail by more than a diode drop etc. 


System Approaches

1.
Try to avoid 'hot plug-in' (i.e. make sure power supplies are OFF before plugging a board).
2.
Electro Static Discharge (ESD) at the I/O pads may trigger latch up. Take precautions.
3.
Do not expose the chip to radiation (e.g. X-ray, cosmic ray, α ray). It is capable of penetrating the chip and can contribute excess electron-hole pairs.
4.
Sudden glitches at the power supply rails have to be eliminated preciously.

Design Approaches

1.
Abide by all design rules to avoid formation of parasitic elements.
2.
Substrate should be highly doped to reduce the substrate resistance (RSUB). This will effectively break the path between the collector of pnp-transistor and the base of npn-transistor.
3.
Apply ground to substrate contacts and power-supply to n-well contacts to eliminate sudden voltage glitches that might trigger the parasitic transistors.
4.
Provide guard rings (a doped region surrounding the MOSFET; biased by power-supply for n-type or ground for p-type rings) around p-well and/or n-well to increase the base width of the parasitic transistors and to maintain well-defined potentials (due to biasing).








PREVIEW OF THE PRESENTATION: 
Here comes a quick glimpse of the Power-Point presentation on "CMOS Latch Up". The whole presentation along with the Author's Note is available for download in a compressed format (.rar) from the mediafire link mentioned after this preview. 








Download Link:
http://www.mediafire.com/?aalmzonchq9f6gj